The future of chips: how gate-all-around design is powering the AI era and the next node
AI Era: next node powered by advanced materials
· TechRadarOpinion By Scott Bibaud published 17 January 2026
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Artificial intelligence (AI) is transforming how the world builds and uses computer chips. From massive data centers to devices at the edge of the network, AI requires chips continuing to get faster, smaller and more energy-efficient.
Scott Bibaud
CEO of Atomera.
For decades, Moore’s Law, which accurately predicted that the number of transistors on a computer chip would double around every two years, kept the industry moving forward.
Unfortunately, conventional scaling approaches through planar complementary metal-oxide-semiconductor (CMOS) devices, or FinFETs, which extended Moore’s Law, have reached their limits. The industry is now facing a critical challenge: trying to keep advancing chip technology when the old rule of thumb no longer applies.
The industry’s answer is gate-all-around (GAA). This design wraps the gate material completely around all sides, including the control part of the chip, known as the gate, that carries the electric current.
This gives engineers more precise control over how electricity flows through the chip, enabling GAA devices to perform better even as the industry carries onto the next node. This also allows more power without taking up more area.
The new bottlenecks
But GAA isn’t perfect. While it solves challenges via lower power consumption and more efficient use of space, it moves the bottleneck to other areas.
Specifically, older chips encounter resistance — anything that slows down electricity — from inside the channel. Most of the resistance comes from the contact points and areas where the current enters and exits.
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